A semiconductor device, such as a complementary metal oxide semiconductor (CMOS) transistor, may have an n channel type MOS transistor and a p channel type MOS transistor integrated on a single substrate. When forming such a semiconductor device, an insulating layer, which may include boron phospho silicate glass (BPSG) oxide having superior fluidity, may be formed to fill a space formed in a gate pattern after forming the gate pattern and silicide. Moreover, a pre-metal dielectric liner (PMD) may be formed before depositing the boron phospho silicate glass oxide layer. This may prevent boron (B) of the boron phospho silicate glass oxide layer from penetrating the substrate through a subsequent thermal process.
FIG. 1 is an example diagram illustrating a semiconductor device having a pre-metal dielectric liner (PMD).
Referring to FIG. 1, an active area of semiconductor substrate 100 having first area A and second area B may be defined by isolation layer 102. An n channel type MOS transistor may be arranged in first area A of semiconductor substrate 100, and a p channel type MOS transistor may be arranged in second area B of semiconductor substrate 100. Nitride layer 110, which may be a pre-metal dielectric liner, may be deposited on a surface (for example, the entire surface) of a resultant substrate. Boron phospho silicate glass oxide layer 120 may be deposited on nitride layer 110.
Nitride layer 110, which may be pre-metal dielectric liner 110, may be used as an etch stop layer when a subsequent etching process for a contact may be performed. In addition, pre-metal dielectric liner 110 may prevent the penetration of boron (B) of boron phospho silicate glass oxide layer 120 into semiconductor substrate 100 during a subsequent thermal process. If impurities such as boron (B) penetrate semiconductor substrate 100, a threshold voltage of a semiconductor device may be locally changed. This may tend to degrade the stability of a resulting device. In the related art, efforts to prevent boron (B) from penetrating the semiconductor substrate include using a gas atmosphere that may be controlled when forming nitride layer 110 as the pre-metal dielectric layer. This may cause a nitride-hydrogen (N—H) coupling force to be enhanced. However, according to the related art method, it may be difficult to prevent boron (B) from penetrating semiconductor substrate 100, and a thickness of nitride layer 110 may be required to be relatively thick.